| 摘要 |
PURPOSE:To execute the link array chain without reducing the priority of the bus acquisition right of an I/O by specifying the starting of a DMA transfer in a system equipped with a DMA controller having a double plane register group. CONSTITUTION:A DMA controller 1 is equipped with double plane register groups 2 and 3 to accumulate transfer information to access a memory 10. Before a DMA is started, the transfer information of a first block is written to the register group 2 of the controller 1 and the transfer information of a second block is written to a register group 3 and a DMA transfer is started. Thus, without reducing the priority of the bus acquisition right of the I/O, the link array chain can be executed. |
