发明名称 SEMICONDUCTOR STORAGE DEVICE
摘要 PURPOSE:To accelerate a writing without increasing manufacturing steps by providing a first word line extended from the gate electrode of MISFET of a memory cell and a second word line separately from the first line, and forming wirings for supplying a stationary potential at the same layer as the second line. CONSTITUTION:A memory cell is formed of a flip-flop circuit and transfer MISFETs Qt1, Qt2 connected between a pair of input/output terminals and complementary data lines DL, DL'. The source regions of driving MISFETs Qd1, Qd2 are connected to wirings 12A for supplying a reference voltage Vss to the memory cell. A first word line WL5 is formed by integrating and extending the gate electrodes of MISFETs Qt1, Qt2 of a plurality of memory cells. A second word line WL12B is extended in parallel with a first word line WL5. The line WL12 is composed of the same level layer as reference voltage wirings 12A. Thus, the resistance of the word line can be reduced by the formation of the second line 12B, and the stationary potential supply wirings 12A and the second line 12B to the memory cell are formed of the same layer, thereby reducing the manufacturing steps.
申请公布号 JPS63239862(A) 申请公布日期 1988.10.05
申请号 JP19870071411 申请日期 1987.03.27
申请人 HITACHI LTD 发明人 IKEDA SHUJI;SASAKI KATSURO;NAGASAWA KOICHI;MEGURO SATOSHI
分类号 G11C11/412;G11C11/40;H01L21/3205;H01L21/8244;H01L23/52;H01L27/10;H01L27/11 主分类号 G11C11/412
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