| 摘要 |
PURPOSE:To obtain a memory controller suitable for an IC application useful for frame memory, etc., by selecting a write request signal of the write request signals provided in two systems within a period of a read cycle by the phase relation of a write clock with a read clock. CONSTITUTION:In the case of writing input data 1 generating asynchronously with the read clock 9 corresponding to the read cycle for data from a memory circuit 2, to the memory circuit 2 by using a gap of the read cycle; write cycles are provided as >=2 systems in the gap of the read cycle. The write request signals of >=2 systems corresponding to the write cycles of >=2 systems are selected to be a write request signal of either one of the systems only to supply the memory circuit 2 by the phase relation of the write clock 4 for the input data 1 against the read clock 9. By this method, a simple constitution can be achieved without influencing the scale of a circuit by increasing the number of memory addresses without using any analog circuits in mono- or multi- circuits, etc.
|
