发明名称 DIFFERENTIAL TYPE LOGIC CIRCUIT
摘要 PURPOSE:To obtain a stable output waveform while keeping high speed performance of the memory by connecting a feedback circuit to an output node of a differential input stage and feeding back it while using an output potential of the feedback circuit as a reference potential. CONSTITUTION:Transistors (TRs) Q1, Q2 form a OML circuit 1 switching the path of the current from a constant current source I1 by using an input potential Vin. A feedback circuit 2 consisting of an emitter follower comprising a TR Q5, a resistor R and a constant current source I2 is connected to an OR side output node n1 of the circuit 1. The potential at a node n4 between the resistor R and the constant current source I2 of the circuit 2 is given to a base of the TR Q2 forming the circuit 1 as a reference potential. Through the constitution above, the reference potential is increased when the potential Vin changes from H to L and the reference potential is decreased when the potential Vin changes from L to H. That is, the reference potential is changed depending on the input potential to quicken the switching timing of the gate. Thus, a stable output waveform is obtained while keeping high speed operation of the components.
申请公布号 JPS63240127(A) 申请公布日期 1988.10.05
申请号 JP19870071504 申请日期 1987.03.27
申请人 HITACHI LTD;HITACHI VLSI ENG CORP 发明人 HARUFUJI SEIICHI;MATSUMURA KENZO
分类号 H03K19/013;H03K19/086 主分类号 H03K19/013
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