发明名称 MICROPROCESSOR WITH OPTION AREA FACILITATING INTERFACING WITH PERIPHERAL DEVICES
摘要 <p>A novel microprocessor architecture can be easily interfaced with various peripheral devices. The microprocessor is generally made up of a CPU core, a RAM, a ROM and an input/output option. RAM adjoins one edge of the CPU core and ROM adjoins the opposite edge of the CPU core. The input/output option adjoins a third edge of the CPU core and parallel edges of the RAM and ROM. The input/output option is adapted to allow interfacing with various peripheral devices. The CPU core comprises CPU and segments commonly used to form a complete microprocessor. Such common segments may include a RAM address register facilitating access to the CPU by the peripheral devices.</p>
申请公布号 CA1242803(A) 申请公布日期 1988.10.04
申请号 CA19850497959 申请日期 1985.12.18
申请人 SONY CORPORATION 发明人 WATANABE, NOBUHISA
分类号 G06F15/78;(IPC1-7):G06F15/06;H01L21/82;H01L27/10;H01L27/04 主分类号 G06F15/78
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