| 摘要 |
PURPOSE:To execute a trigger detection, when an absolute value of a variation quantity of a data has become larger than a set value, by adding a holding latch to a conventional trigger detecting circuit. CONSTITUTION:A first and a second latches 21, 22 for sampling an address bus and a data bus of a target microprocessor 1 are provided. Also a third latch 23 is provided and after one bus cycle, an output of the second latch is latched. In such a way, the previous value stored in a memory for storing an input data, and a value of this time are detected, and these two values are inputted as an address of a data trigger RAM. To each address of the data trigger RAM, a set value is set in advance, and in accordance with the address, in other words, in accordance with the previous value of the input data and the value of this time, a trigger data is set only when its difference has exceeded a prescribed magnitude. In such a way, when a difference between the previous value of the data and the value of this time has exceeded a prescribed magnitude, a trigger output can be obtained from the data trigger RAM. |
