发明名称 RESETTING CIRCUIT
摘要 <p>PURPOSE:To securely generate a resetting signal without being influenced by the rise characteristic of a power source voltage by connecting in a multistage and cascade way a resistance load type source ground circuit stage and a capacity load type source ground circuit. CONSTITUTION:Transistors Tr1, 3 and 2 for driving of respective stages are respectively of an enhancement form and have a threshold value voltage. By connecting the drain of a Tr1 and a gate, the rise of the output contact voltage of a source grounding circuit 51 is delayed compared with the rise a power source voltage Vdd. An output contact (a) starts the voltage rise after the power source voltage exceeds the threshold voltage. In the same way, at an output point (b) of a source grounding circuit 52, the rise is delayed by the threshold voltage of Tr1 and Tr3 only. The rise of the output voltage of an output contact (c) of a source grounding circuit 53 is delayed only by the time constant of the integrating circuit composed of the sum of the delaying of respective threshold voltages of Tr1 and 3, Tr2 and a capacity 8. The output voltage of the circuit 53 is inputted to a Schmidt trigger and converted to binary information having hysteresis.</p>
申请公布号 JPS63234720(A) 申请公布日期 1988.09.30
申请号 JP19870069349 申请日期 1987.03.24
申请人 NIPPON DENSO CO LTD 发明人 BAN HIROYUKI
分类号 G06F1/24;G06F1/00;H03K17/22 主分类号 G06F1/24
代理机构 代理人
主权项
地址