PHASE LOCKED LOOP CIRCUIT

摘要

PURPOSE:To supply a stable clock to an image coding/decoding device by switching the input control voltage of a voltage control oscillator with the synchronizing non- synchronizing condition of an input signal and the stable unstable condition of the phase of the input signal. CONSTITUTION:A synchronizing non-synchronizing deciding circuit 3 detects the pull-out of an input signal (a) and outputs a deciding signal (c). A moving tolerance circuit 4 decides whether or not the size of the phase change of the signal (a) is the synchronizing pull-in tolerance of a phase comparator 2, and outputs a deciding signal (g). A switching device 6 executes the switching of a phase difference voltage and a constant voltage (f) from an LPF 5 by the conditions of signals (c) and (g) from an output (m) of a sequencer 61 to control whether the signal (a) is the synchronizing condition or the non-synchronizing condition. The switching device 6 attains the switching timing of voltages (e) and (f) by a register 62 latched by a frame pulse of a TV signal at the head of a frame. The output (h) of the switching device 6 controls a voltage control oscillator 7, the oscillator 7 generates a sampling clock (i) synchronized to the signal (a) by the output (h) and a clock (i) of the non-synchronization and a clock (i) non- synchronized to the input signal and supplies them to an 1/N frequency-dividing circuit 8.