Highly integrated master-slice IC having a memory area, and method for producing it

摘要

A gate array chip having an array composed of strip-shaped active zones is constructed on a semiconductor substrate. Zones assigned to the wiring respectively have a capacity for two to four wires. The latter are arranged between the respectively adjacent pairs of active zones. One or more active zones are used as wiring zones in a logic switching region. The wiring is carried out in storage blocks by using only zones assigned to the wiring. A corresponding master-slice IC has a high degree of integration and a high operating speed.