| 摘要 |
PURPOSE:To obtain the same gain and the same noise margin as those, obtained at the time of the inputting of a double phase, by giving only the input signal of a single phase by inputting the signal of a drain terminal of a first or a second FET to the gate of the second or the first FET through one of source follower type buffer circuits. CONSTITUTION:Load resistances 3, 4 are connected to the drain terminals of the switching FETs 1, 2, and the other terminals of the load resistances are connected to a circuit power source VDD through a level shifter 5. The source of the FETs 1, 2 is grounded through a constant current source 11. The drain terminal of a source follower FET 7, and the drain terminal of the FET 7 is connected to the VDD, and the source is grounded through the level shifter 9 and a constant current source 11. When the signal is inputted to the gate of the FET 1, an opposite phase is generated at the drain terminal of the said FET, and the signal, the phase of which is inverted, is inputted to the gate of the FET 2 through the source follower FET 7 and the level shifter 9. |
