| 摘要 |
PURPOSE:To simplify a synchronizing detection circuit for each line of a frame synchronizing circuit by counting the number of bits of the state of synchronization/asynchronization of data by one line, shifting reception data for the number (m) bits equivalent to one line and applying multiplex processing to reception data for n lines. CONSTITUTION:A selector 3 selects sequentially data D1 of each line in n lines of reception data to be inputted and one status transition counter 4 counts sequentially data of each line of reception data for n lines to be inputted. Moreover, a shift register 5 of n-bit capacity shifts and stores sequentially the count output of the counter 4 in 48 bits each and the readout output D2 is inputted to the input side of the selector 3. Then one set of the status transition counter 4 counting the number of status of synchronization/asynchronization with respect to one line 48 bits in response to reception data strings of 48n sets in total obtained by multiplexing data of one line 48 bits, and n-bit shift register 5 shifting the data by 48 bits for one line each have only to be provided, then the synchronizing state of n lines is detected. Thus, the synchronizing detection circuit for the frame synchronizing circuit is simplified. |
