发明名称 |
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING FORMING A MULTI-LEVEL INTERCONNECTION LAYER |
摘要 |
This invention provides a method of manufacturing a semiconductor device wherein multi-layer interconnections of high reliability can be achieved by simple steps. …<??>This invention is characterized in that it comprises the following steps: a step of forming a first interconnection layer on a semiconductor substrate; a step of selectively forming pillars on this first interconnection layer; a step of forming an insulating layer to partially isolate the first interconnection layer and a second interconnection layer; and a step of forming the second interconnection layer connected with the pillars; characterized in that the method further comprises; a step of forming a multi-layer structured layer (33, 34) consisting of a first layer (33) including Al and a second layer (34) including refractory metal on the semiconductor substrate (31); a step of forming a first interconnection layer (35) of required shape by patterning the first layer (33) and forming a layer pattern (36) on the interconnection layer by patterning the second layer (34); a step of forming pillars (38) by selectively leaving behind the layer pattern (36) in locations such as to contact a second interconnection layer; a step of forming an insulating layer (39) including SiO2; a step of exposing the tops of the pillars (38) from the insulating layer (39); and a step of forming the second interconnection layer (40) connected with the pillars. |
申请公布号 |
EP0215542(A3) |
申请公布日期 |
1988.09.28 |
申请号 |
EP19860303513 |
申请日期 |
1986.05.08 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
OKUMURA, KATSUYA C/O PATENT DIVISION |
分类号 |
H01L21/3205;H01L21/44;H01L21/768;H01L23/522;(IPC1-7):H01L21/90;H01L23/52 |
主分类号 |
H01L21/3205 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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