发明名称 SEMICONDUCTOR MEMORY CIRCUIT
摘要 PURPOSE:To use two sense amplifiers and to read two-bit data out of a memory cell by storing two bits in each memory cell according to the memory cell state which changes according to the relation between the gate and drain voltages of the transistor (Tr) of the memory cell and combining two discontinuous states. CONSTITUTION:MOS transistor Trs T10-T17 are arrayed in the row direction and column direction of a semiconductor memory circuit to enable 16-bit storage. A voltage applied to the drain of this memory cell is selected by the Trs T01-T04 to detect flowing currents by Trs T05 and T06. Then Trs T20-T23 select whether or not the sources of the Trs T10-T17 of the memory cell are grounded and sense amplifiers S1 and S2 detect currents flowing to the Trs T05 and T06. Then two-bit storage contents are read out of the memory cell by using the sense amplifiers S1 and S2 according to the state of the cell when the gate voltage of the memory cell is raised and the state of the cell of the drain voltage is raised.
申请公布号 JPS63231797(A) 申请公布日期 1988.09.27
申请号 JP19870066563 申请日期 1987.03.19
申请人 NEC CORP 发明人 KOBAYASHI MASAHIRO
分类号 G11C16/04;G11C17/00;H01L21/8246;H01L27/10;H01L27/112 主分类号 G11C16/04
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