| 摘要 |
PURPOSE:To reduce the number of signal lines by providing write-enable signal lines for rows and column strobe signal lines for columns, selecting a dynamic RAM element as a point of intersection among them and writing data in the element. CONSTITUTION:The dynamic RAM elements M11-Mmn are disposed in an array fashion of (m)X(n), and a row-address strobe signal line RAS is connected in common with all of the elements, whereas column-address strobe signal lines CAS1-CASm are connected in common for the number of columns of (m). AT the same time, the write-enable signal lines WE1-WEn are connected in common for the number of rows of (n). Consequently, a dynamic RAM element as a point of intersection among those lines is selected and then written with the data. Since one line is dealt with those signal lines CAS1-CASm for the column, while one line is dealt with signal lines WE1-WEn for the row, the number of signal lines can be minimized, thus facilitating a larger capacity development.
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