发明名称 |
High speed low pin count bus interface |
摘要 |
Bus interface apparatus is provided to drive a high speed bus with two nonoverlapping clock signals. The apparatus takes advantage of the inherent bus capacitance which will temporarily hold data signals placed on the bus by using bus interface circuitry having high input and output impedances. That circuitry can thus be activated by coincident signals.
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申请公布号 |
US4774422(A) |
申请公布日期 |
1988.09.27 |
申请号 |
US19870044780 |
申请日期 |
1987.05.01 |
申请人 |
DIGITAL EQUIPMENT CORPORATION |
发明人 |
DONALDSON, DARREL D.;GILLETT, JR., RICHARD B.;WILLIAMS, DOUGLAS D. |
分类号 |
G06F3/00;G06F13/40;(IPC1-7):H03K17/16;H03K19/017;H03K19/092 |
主分类号 |
G06F3/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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