发明名称 SYNCHRONIZING PROTECTION CIRCUIT
摘要 <p>PURPOSE:To attain the protection of plural reception data without increasing the circuit scale by storing the count of a frame counter with respect to the received data and the history of the result of detection of a frame pattern. CONSTITUTION:A detection pulse generated by a frame pattern detection circuit 6 is sent as a timing pulse via a select means 7 and the count of a frame counter 5 is written in a storage/frame alarm means 71 by using the detection pulse. If no frame pattern is detected by the frame pattern detection circuit 6, when the count written precedingly in the storage frame alarm means 71 and the count of the frame counter 5 are coincident, a coincident pulse outputted from a comparison means 72 is outputted as a timing pulse via a select means 73. The history of the result of frame pattern detection is also written in the storage/frame alarm means 71 and the establishment of synchronization is discriminated based thereupon.</p>
申请公布号 JPS63229928(A) 申请公布日期 1988.09.26
申请号 JP19870064710 申请日期 1987.03.19
申请人 FUJITSU LTD 发明人 YONEKURA TAKESHI
分类号 H04J3/06;H04L7/08 主分类号 H04J3/06
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