发明名称 CLOCK SKEW CALCULATING SYSTEM
摘要 <p>PURPOSE:To simply calculate the clock skew between two FF by providing a clock skew calculation means and a skew table containing the clock skew values corresponding to the 1st-n-th hierarchies respectively. CONSTITUTION:The skew values corresponding to each hierarchy are written into a skew table 6. When the calculation of skew value is desired between the clock input pins A and B, an operator supplies the clock paths CLKA1, CLKB1 and CLKC1 of the pin A and the clock paths CLKA1, CLKB2 and CLKC3 to clock skew calculation means 5. The means 5 checks the coincidence or discordance successively at and after the branch path name belonging to the 1st hierarchy and then outputs the clock skew value of the i-th hierarchy of the table 6 in case no coincidence is obtained between branch path names of both pins A and B in the i-th hierarchy.</p>
申请公布号 JPS63229510(A) 申请公布日期 1988.09.26
申请号 JP19870065232 申请日期 1987.03.18
申请人 FUJITSU LTD 发明人 KAWAMURA HACHIRO
分类号 G06F1/10;G06F1/04;H03K5/15 主分类号 G06F1/10
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