发明名称 RESIDUE ARITHMETIC UNIT
摘要 PURPOSE:To perform a prescribed residue arithmetic operation at high speed and to extremely decrease the number of memories to be used, by holding previously the information into a memory relating to the quotient obtained by dividing the value of the part of a digit having larger value than an integer (n) among output of multiplier by (n). CONSTITUTION:A number (a) to be calculated and shown in 512 bits is stored in a register 1 of 513 bits and a divisor (n) shown in 512 bits is stored in a divisor register 5. A 2-bit left shifter 2 shifts the contents (a) of the register 1 by 2 bits to obtain 4a. The higher rank 4 bits are defined as addresses out of 515 bits of the output of the shifter 2 to give an access to a memory 3. The memory 3 outputs a product (qn) of the divisor (n) and the quotient (q) obtained by dividing the value of the shown equation by (n). A subtractor 4 subtracts the output (qn) of the memory 3 from the output 4a of the shifter 2 and outputs the result (a1=4a-qn) to the register 1. Then (a1-n) is obtained by a subtractor 6 in order to obtain the final residue and a multiplexer 7 selects the result of subtraction and outputs it to a register 8 when the result of (a1-n) is positive or equal to 0 and then selects a1 and outputs it to the register 8 when said result is negative respectively. Thus the final result (a=2<2>aMODn) is obtained at the register 8.
申请公布号 JPS63229531(A) 申请公布日期 1988.09.26
申请号 JP19870064532 申请日期 1987.03.19
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KANO YASUO
分类号 G06F11/10;G06F7/72;G09C1/00;H03M13/00 主分类号 G06F11/10
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