发明名称 SEQUENTIAL DECODER
摘要 PURPOSE:To correctly decode a member code by providing a correction circuit for inverting or replacing demodulated data if a consecutive error takes place in a received code. CONSTITUTION:If a sequential decoder 5 receives replaced or inverted data, since a received code stored in a buffer causes a consecutive erroneous code, a consecutive error detection circuit 6 measures the duration time of a skip signal generated to avoid consecutively erroneous code strings. If the duration time exceeds a predetermined time, a correction pattern in a correction circuit 4 provided to the input side of the sequential decoder 5 is switched by using an error signal sent from the consecutive error detection circuit 6 to replace or invert the demodulated data. Since the correction of the replacement or inversion of data is applied before the data is inputted to the sequential decoder 5 in this way, the member code is decoded correctly.
申请公布号 JPS63229952(A) 申请公布日期 1988.09.26
申请号 JP19870062573 申请日期 1987.03.19
申请人 FUJITSU LTD 发明人 SHIMODA KANEYASU;AGENO YUUZOU;KATO TADAYOSHI
分类号 H03M5/22;H03M5/12;H03M13/23;H04L27/22 主分类号 H03M5/22
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