发明名称 CONTROL SYSTEM FOR SCREEN SYNTHESIZATION OF DISPLAY DEVICE
摘要 PURPOSE:To reduce the memory capacity by securing such constitution where a memory contains a page mode function, allocates plural screen areas, reads out picture data out of each screen area within one memory cycle and can control independently the screen contents. CONSTITUTION:A memory control circuit 5a gives a column address-enable CAE2 to an address converter 5b and deletes a latch-enable column address- enable CAE1. The converter 5b outputs the column address of a screen area 2b to a memory 2' and then outputs cursor data on the area 2b with the row and column addresses fixed by a column address strobe CAS of the circuit 5a. The circuit 5a gives P/S conversion enable to P/S converters 21 and 22. Thus the converters 21 and 22 output 8-bit series image data and cursor data. Then an OR circuit 4 secures OR for each bit and this result is turned into synthetic image signals and then into video signals with synchronization to be displayed on a display.
申请公布号 JPS63229575(A) 申请公布日期 1988.09.26
申请号 JP19870065151 申请日期 1987.03.19
申请人 FUJITSU LTD 发明人 TABATA KATSUYA
分类号 G06F3/153;G06T1/00;G06T3/00 主分类号 G06F3/153
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