| 摘要 |
PURPOSE:To cause a reading speed to be faster without making a circuit constitution complicated in vain by connecting the output side of a precharging circuit which synchronizes to an equalizing signal to output the voltage of the intermediate level between the high level and the low level of a main data line, to the main data line in parallel. CONSTITUTION:The title device is provided with a precharging circuit 11 which generates the voltage of the intermediate level between the high level and the low level of a main data line 4 synchronized with an equalizing signal, and the output terminal of the precharging circuit 11 is connected to the main data line 4 in parallel. Thus, since the output side of the precharging circuit 11 is connected in parallel to the main data line 4, the precharging circuit 11 does not come to be the passage of a data signal. Consequently, the precharging circuit 11 does not cause a factor to generate the delay of the data signal and executes only the function to improve a reading speed by means of the precharging. Thus, the reading speed can be improved.
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