| 摘要 |
PURPOSE:To speed up image processing and to improve processing capacity by connecting a bit rearranging circuit to the output sides of plural registers connected to a DMA control device to form a circuit for controlling I/O to/from a memory. CONSTITUTION:The bit rearranging circuit 3 is connected to the output sides of plural registers 21-2n connected to the DMA control circuit 1. A control circuit 4 controls which register out of the registers 21-2n inputs data read out from the memory 5 by opening a gate 6. On the other hand, the control circuit 4 controls the circuit 3, rearranges data outputted from the registers 21-2n and opens a gate 7 to input the data to the memory 5. Thereby, bit rearrangement at the time of image processing can be processed also by a hardward at the time of DMA transfer in addition to software processing, so that the image processing can be speeded up and the processing capacity can be improved. |
