发明名称 CHARACTER MULTIPLEX SIGNAL RECEIVING CIRCUIT
摘要 PURPOSE:To prevent malfunction by attenuating or annihilating a regenerated clock in every horizontal synchronizing period. CONSTITUTION:When a burst signal is applied to an input terminal 1, a crystal oscillator 3 is driven to generate a ringing signal at a load resistance R2, and the signal is turned and amplified by a transistor (TR) Q2 and a transformer T2 and sent as a clock output to an output terminal 7. Part of this clock output reaches an adjusting circuit 5 through an AND gate 9. The adjusting circuit 5 adjusts its phase and level lastly, and the clock output is impressed to the crystal while 180 deg. out of phase with the output ringing of the crystal oscillator 3 and having such a level that attenuation is excellent. Consequently, the ringing generated by the crystal oscillator 3 is attenuated or annihilated in the arrival period of the horizontal synchronizing signal and no influence upon the next regenerated clock is exerted.
申请公布号 JPS59112782(A) 申请公布日期 1984.06.29
申请号 JP19820222680 申请日期 1982.12.18
申请人 ZENERARU:KK 发明人 SHIOYA NORIAKI
分类号 H04N7/025;H04N7/03;H04N7/035 主分类号 H04N7/025
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