发明名称 BUS DRIVER/RECEIVER POWER CONTROL SYSTEM FOR SLAVE PROCESSOR
摘要 PURPOSE:To protect active data on a data bus which is apt to be affected at the time of disconnection and insertion by controlling the power of a slave processor by a master processor. CONSTITUTION:Before a slave processor (#1) 2 is disconnected, a typewriter 15 is operated to send a power-off signal from a master processor 1 through a control line (#1) 12 and the power of a bus driver/receiver (#1) 6 is turned off. Consequently, the slave processor (#1) 2 is completely disconnected from the system. When functions are restored after the slave processor (#1) 2 is inserted again, the typewriter 15 is operated to send a power-on signal from the control line (#1) 12 and the power of the bus driver/receiver (#1) 6 is turned on, and thereby, the slave processor (#1) 2 is returned to the system. Thus, active data on a data bus 5 is not affected even if the power of the whole of the system is turned on.
申请公布号 JPS63225850(A) 申请公布日期 1988.09.20
申请号 JP19870059864 申请日期 1987.03.14
申请人 NEC CORP;NEC ENG LTD;NIPPON DENKI TSUSHIN SYST KK 发明人 MANABE SHINICHI;NAGAKUBO KOICHI;KAWABATA MASAKI;IGARASHI AKIO
分类号 G06F13/00;G06F15/16 主分类号 G06F13/00
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