| 摘要 |
PURPOSE:To provide a semiconductor storage device having high degree of integration and a decreased change-over region while employing folded arrangement for bit lines, by providing a word line on a gate electrode such that the word line jumps over a desired number of cell array block boundaries and is contacted with the gate electrodes at the block boundaries. CONSTITUTION:A pair of memory cells are provided in each semiconductor island region 1 and cell array blocks 2 are formed by partitioning in the 'low' direction. The cell array blocks 2 are arranged with deviation by one cell pitch and gate electrodes 6 of the memory cells are extended so as to be common to the blocks. A pair of bit lines BL of a sense amplifier S/A are arranged between the deviated cell array blocks 2. A word line 7 is provided on each gate electrode 6 by low-resistance wiring such that the word line 7 jumps over a desired number of block boundaries and is contacted with the gate electrodes 6 at the block boundaries. According to such constitution, there is no need of increasing the contact region and the cell array block 2 is allowed to have a relatively small width in the 'low' direction. Further, it is made possible to solve problems such as increase of a change-over region 3 and unbalanced capacitances of the bit lines BL. |
