发明名称 ARITHMETIC PROCESSOR
摘要 PURPOSE:To improve the system performance by suppressing the interruptions for a fixed time after the tasks are switched so that the task switching frequency caused by the interruptions is decreased. CONSTITUTION:When tasks are switched, the timer set value of a register 5 is set at a timepiece (timer) 3 and the subtraction is started in response to a clock signal 12. When the set value of the timer 3 becomes negative, a timer run-out signal 14 is turned on. The signal 14 is applied to an AND gate 4 as an output signal 15 via a gate 6 when a task executing signal 11 is kept turned off, that is, while no tasks is carried out. When an interruption factor is produced, an interruption factor signal 7 is accepted by an interruption holding circuit 1 and an interruption holding signal 8 is produced. Under such conditions, an interruption signal 9 is produced when the signal 15 is applied to the gate 4. Thus the tasks are switched by an interruption control task switching circuit 2.
申请公布号 JPS63223835(A) 申请公布日期 1988.09.19
申请号 JP19870057068 申请日期 1987.03.12
申请人 NEC CORP 发明人 TAMURA YOKO
分类号 G06F9/46 主分类号 G06F9/46
代理机构 代理人
主权项
地址