发明名称 DATA INITIALIZATION SYSTEM FOR MEMORY
摘要 <p>PURPOSE:To shorten a time required for an initialization down to the time of 1/n, through an n-banks constitution, at the time of the leading of a power supply by obtaining a bank selecting signal to select respective memory banks in the lump, for the initialization of the plural memory banks. CONSTITUTION:At the time of the application of the power supply, the flip flop FF of a mode switching circuit 7 is set and all the memory banks 11-1n are selected through OR gates 61-6n and low-order address data are written in all the memory banks 11-1n in parallel by an initialization program. Then, when the initializations of all the memory banks 11-1n are completed the memory bank return to normal mode by giving a mode restoring signal to the mode switching circuit 7 by the initialization program. Thus, the initialization of the memory banks 11-1n is performed in the same time as required to process one bank portion in an objective memory area, namely in the time of 1/n of a of conventional time at n-bank.</p>
申请公布号 JPS63224095(A) 申请公布日期 1988.09.19
申请号 JP19870058480 申请日期 1987.03.13
申请人 MEIDENSHA ELECTRIC MFG CO LTD 发明人 SETO EIICHI
分类号 G06F1/24;G06F1/00;G06F12/06;G11C7/00 主分类号 G06F1/24
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