| 摘要 |
PURPOSE:To constitute many memories without enlarging the scale of a system by inputting an external address to a RAM and outputting data stored in the address as the address of a main memory. CONSTITUTION:An address signal SG1 corresponding to a memory block #1 from a CPU1 is outputted to an FF2 and a request signal SG2 and a read signal SG3 are outputted to a timing control circuit 3. The circuit 3 outputs a clock signal SG4 to the FF2 and a chip select signal SG6 and a read signal SG7 to a RAM4. Thereby, the signal SG1 is outputted to the RAM4 as an address signal SG5 through the FF2. The RAM4 reads the leading address of the block #1 based on the signals SGs 5, 6, 7 and outputs to the main memory 5. Then, when the signal SG1 is repeatedly outputted, an address signal SG9 is added by one and sequentially read. Thereby, the many memories can be constituted without enlarging the scale.
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