Circuit arrangement of several different processors with a common working memory unit

摘要

The invention is related to the field of electrical control engineering, and its possible application areas are stored-program control units. According to the invention, a unidirectional buffer memory (UPS) and a multiplexer (MUX) are arranged, and they ensure that a bit-organised special processor (SP) and a byte/word-organised microprocessor (MP) work with a common working memory unit, and are implemented using a minimum number of circuits. Using this supplementary circuit, a byte which is modified in a BiL is generated at the output of the first multiplexer (MUX1), and then input via a bidirectional data bus (BDB) into a byte-organised memory block (BSB). <IMAGE>