CIRCUIT FOR AUTOMATICALLY REDUCING LOGIC ZERO VOLTAGE OF PCM ENCODER INPUT CHANNEL,申请号PL19860263223-传众专利搜索

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发明名称	CIRCUIT FOR AUTOMATICALLY REDUCING LOGIC ZERO VOLTAGE OF PCM ENCODER INPUT CHANNEL
摘要
申请公布号	PL263223(A1)	申请公布日期	1988.09.15
申请号	PL19860263223	申请日期	1986.12.22
申请人		发明人
分类号	H03G;H03G11/08;H03M;H03M13/00;(IPC1-7):H03G/;H03M/	主分类号	H03G
代理机构		代理人
主权项
地址

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