| 摘要 |
PURPOSE:To perform the arithmetic processing at a high speed by using a shift register connected to a primitive irreducible polynomial for a Galois field of GF (2<m>), a microprocessor and its subordinate RAM, etc., to constitute a multiplying device. CONSTITUTION:For a shift register 1 connected to a primitive irreducible polynomial of GF (2<4>), the lowest order is regarded as X<0>=1 and then as X<1>, X<2> and X<3> toward the higher orders. Then the register 1 is sent toward the highest order from the lowest one when a clock CLK is applied via a lead wire 4. When X<4> is obtained with transmission of X<3>, the X<4> is written to X<0>=1. At the same time, the value with which the X<0>=1 is sent and the output received from the X<4> are calculated by an exclusive OR circuit 11 and the result of this calculation is written to the X<1>. A microcomputer 2 contains a CPU, a RAM and a ROM together with a multiplicand register area 21, a multiplier register area 22 and a result register area 23. Thus the register 1 connected to the primitive irreducible polynomial is actuated for fast production of a desired polynomial. |
