发明名称 INTERCONNECTION STRUCTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To lower electrical resistance of a power source and a grounding line and to lower a power impedance and to increase an operational speed of the element, by forming a power source interconnection on one main surface of a semiconductor substrate so as to be shaped into a ground plane and making the power source interconnection be independent of a signal line and so increasing a capacity of the power source interconnection to ground. CONSTITUTION:Active elements, which consist of gate electrodes 103 and a diffusion layer 104 and the like and are isolated by an element isolation film 102 formed on a silicon substrate 101, are connected with a first layer interconnection 107 through contact hole interconnection 106. A second layer interconnection 110 and the first layer interconnection 107 are insulated through a second layer insulating film 108 and electrically connected through first through hole interconnection 109. A third layer interconnection 113 and a fourth layer interconnection 116 are formed as ground plate interconnection on the almost whole surface of the silicon substrate 101. Electrical connections between these interconnection layers and the active element or the lower layer are performed by through hole interconnections 112 and 115 and the like. Electrical insulation between the third layer interconnection 113 and the through hole interconnection 115 can be realized by a metallic oxidizing film 118.
申请公布号 JPS63221649(A) 申请公布日期 1988.09.14
申请号 JP19870055716 申请日期 1987.03.10
申请人 NEC CORP 发明人 TSUNENARI KINJI;HAMANO KUNIYUKI
分类号 H01L23/522;H01L21/768 主分类号 H01L23/522
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