| 摘要 |
An address comparator compares a write address value and a read address value for designating addresses in an elastic store circuit. More specifically, the count output of a write address counter (20) for counting a write clock signal is decoded by a write address decoder (30) and the count output of a read address counter (50) for counting a read clock signal is decoded by a read address decoder (40). The respective decoded outputs are classified into a plurality of groups so as to be supplied to a logical circuit group (10). The logical circuit group (10) provides a signal for giving an alarm when the output address value of the write address counter (20) is applied in a predetermined number of address groups including as the center the address group to which the output address value of the read address counter (50) belongs. With such arrangement, a timing difference between a write address value and a read address value can be always observed and even if the timing difference is changed rapidly, the timing difference entering the alarm zone can be detected.
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