| 摘要 |
PURPOSE:To suppress the drop of the efficiency or performance of a CPU and I/O control devices by allowing a state monitoring device to monitor the I/O control devices through a signal line different from a common bus. CONSTITUTION:The state monitoring device 14 periodically monitors the state data for all the I/O control devices 121-123 connected to the common bus 10 through the signal line 14 and stores read state data in a storage circuit 132. In case of confirming a part or all of the I/O control devices 121-123 connected to the common bus 10, the device 13 is commanded by an I/O instruction to extract the state data stored in the storage device 132 by a bus response circuit 133 and sent to the CPU 11 through the common bus 10. Thereby, a part or all the states of the I/O control devices 121-123 connected to the common bus 10 can be confirmed only by sending an instruction only to the device 13.
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