发明名称 |
Isochronous clock reconstruction |
摘要 |
An electronic system for providing a stable, isochronous clock signal with very low jitter and slew rate to thereby permit multiplexing of data from an external source which is not synchronous with the multiplexer frame rate.
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申请公布号 |
US4771426(A) |
申请公布日期 |
1988.09.13 |
申请号 |
US19860886771 |
申请日期 |
1986.07.17 |
申请人 |
UNISYS CORPORATION |
发明人 |
RATTLINGOURD, GLEN D.;WELLS, RICHARD K.;NELSON, JAMES R. |
分类号 |
H04J3/07;(IPC1-7):H04J3/06 |
主分类号 |
H04J3/07 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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