| 摘要 |
PURPOSE:To decrease number of components while simplifying circuit constitution by reading a symbol from a RAM and using a timing signal to calculate the syndrome and a timing signal applying prescribed arithmetic processing so as to detect an error. CONSTITUTION:A syndrome arithmetic means obtains a syndrome from a symbol from a RAM 1 and 1, alpha-alpha<3> (alpha is a root of the 8-th order primitive polynomial) by using a clock pulse SCLK, the result is divided repetitively by 1, alpha-alpha<2> to obtain S'0-S'3. Adder means 7-9 calculate the sum S'0+S'1 to input the result to a single and a double error detection means 11, 12. The number of times of divisions is counted and stored by a counter means 15. When the means 11 detects S'0+S'1=...=S'2+S'3=0, the existence of signal error is detected and the error location (j) is discriminated by the content of the means 15. When the means 12 detects the output of S'0+S'1=(S'1+S'2)/alpha<a>=(S'2+S'3)/alpha<2a> via 1/alpha and 1/alpha<2> arithmetic elements, two data errors are detected and the error location difference a=i-j, error locations j, i are discriminated.
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