| 摘要 |
<p>PURPOSE:To prevent the lack of reception data by using a clock generated at a system cycle tau and a clock generated at a period being an (m) times as long as the system cycle, operating/stopping a reception register after ntau after the production/interruption of the clock activating a transmission register and employing FIFO system for a reception register. CONSTITUTION:As the transmission register, a register FF-A is used, which synchronizes with a 1st clock F-CLK generated at a prescribed period tau and fetches a data by using a 2nd clock C-CLK having an optional period mtau, and as a reception register, a register stack FF-F is used. Moreover, the register stack is provided with a means RAC counting the 2nd clock to generate the readout address of the register stack and means WAC, CE counting the 1st clock during the even when the 2nd clock is interrupted to generate the write address of the register stack. Thus, since FIFO is used for the reception register, the lack of reception data generated at the increase (interruption) of the 2nd clock period is prevented.</p> |
