| 摘要 |
PURPOSE:To reduce ON resistance, and to increase gm of an element by forming a high concentration S/D region being in contact with the external side surface of a low concentration S/D region in a self-alignment manner to the external side surface of a second gate electrode. CONSTITUTION:Second gate electrodes 15A and 15B connected in an ohmic- contact manner with a first gate electrode 5 self-aligned with first and second n<-> type low concentration S/D regions 6A and 6B and contributing to the formation of a channel are each disposed to the upper sections of the regions 6A and 6B. Consequently, when voltage on the positive side to a base body such as approximately 5V is applied to the first gate electrode 5 and a FET is turned 'ON', voltage at approximately the same 8V is also applied to the second gate electrodes 15A and 15B at the same time, and the first and second n<-> type low concentration S/D regions 6A and 6B as depletion regions are further depleted, thus largely reducing the surface resistance of these regions. Accordingly, the series resistance of the 'ON' state of the FET is lowered, thus increasing mutual conductance (gm).
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