发明名称 INFORMATION PROCESSOR FOR PIPELINE CONTROL
摘要 PURPOSE:To improve the instruction retry rate by using a replacement suppression indicating control circuit which outputs a replacement suppressing instruction right after a replacement stage is carried out by an instruction end instruction command to avoid destruction of a register, a memory and a valid display flag for instruction retry caused by errors. CONSTITUTION:The replacement suppression control logic circuits 1101-1104 detect the presence or absence of an instruction end instruction command on a stage preceding an error detecting stage when an error is detected at a stage preceding a replacement stage. When the presence of said command is confirmed, at least a single instruction end instruction command outputs a replacement suppressing instruction right after the replacement stage is carried out. Thus it is possible to avoid the destruction of a register, a memory and an instruction retry valid display flag which are caused by errors. As a result, the instruction retry rate is improved.
申请公布号 JPS63217424(A) 申请公布日期 1988.09.09
申请号 JP19870051320 申请日期 1987.03.05
申请人 NEC CORP 发明人 IWATA ATSUSHI
分类号 G06F9/22;G06F9/28;G06F11/14 主分类号 G06F9/22
代理机构 代理人
主权项
地址