| 摘要 |
PURPOSE:To obtain a comparator with fast response speed and high accuracy by providing a bypass circuit giving an output of a differential stage to other differential stage while bypassing differential stages on its way. CONSTITUTION:An input signal is amplified by a differential stage Dl, given to a differential stage D2 through a level shift circuit S, transistors (TRs) Q5, Q6 and Q13, Q14 are started by the signal and D1, D2 are started at the same time. Just after an input signal is changed, the output of the D1 is directly given to the TRs Q13, Q14, an output Vout is changed to eliminate the transmission delay by the D22. The gain of the comparator in this case is given as a product between the gain G1 of the Dl and a gain G''3 by the TRs Q13, Q14. In driving elements Q9, Ql0 of D2, the gain of D3 is the sum of gains G'3 and G''3 by the TRs Q9, Q10 and a sufficient gain of G1G2(G'3=G''3) as a whole is obtained. Just after the input signal is changed, the signal passes through the differential stage and the number of stages is decreased, the reply time is decreased and then sufficient gain is obtained by giving the signal thorough each differential stage to establish the high performance comparator.
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