| 摘要 |
PURPOSE:To attain frequency ripple reduction of an output signal, excellent response and jitter suppression by providing a smoothing filter separately from a loop filter in a phase locked loop circuit to supply a current without containing ripple to the loop filter. CONSTITUTION:A phase comparator PD detects a phase difference of inputs D1, D2 and a difference in the pulse width of pulses T1, T2 and a pulse T3 not superimposed with the pulses T1, T2 is outputted. A smoothing filter TI receives the pulses T1-T3 to output a current proportional to the time differ ence of pulse widths T'1, T'2. The capacitor CF and the resistor RF connected in series between the output of the filter TI and ground constitute a loop filter. The output f0 of the voltage controlled oscillator VCO is supplied to the phase comparator PD as an input D2 via the counter and the input signal fi is used as the input D1. Through the constitution above the circuit acts like making the frequency and phase coincident. Since the filter TI has not output ripple regardless of high response, no ripple exists in the f0 and since the loop charac teristic is unchanged by the TI, jitter is not increased and stable PLL with high accuracy is realized.
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