| 摘要 |
PURPOSE:To contrive the reduction of the cycle time of a partial write operation by applying only data write at partial write cycle and writing a check bit by a succeeding access cycle. CONSTITUTION:Two sets 51, 52 of error correction code storage memories and a flag memory 55 showing in which of memories for storing the two sets of error correction code an error correction code to a certain data is stored are provided. The write control of a data storage memory 50 is executed in the unit of bytes and only the write of partial write data is applied at partial write cycle and the write of the error correction code to the data subjected to partial write is executed at the next succeeding partial write. Thus, the cycle time of the partial write is shortened by the data error correction and error correction code generating time. |
