发明名称 Test arrangement for high-speed ICs
摘要 Increasing the accuracy of the measurement of high-speed IC parameters, for example of internal transit times and potential crossover variation. The test arrangement contains at least one circuit board (oLP, uLP) which carries lines (Lg and L2, L3, L5, L7) and underneath these RF signal feed lines (L2) and RF signal path lines (L5) and which exhibits, at line ends, object contacts (A) for connecting IC terminals and, at other line ends, test terminals (Kt, Bu) for connecting one or more measuring instruments (Osz). The circuit board (oLP) carries additional test lines (L3) which are in each case connected, in the immediate vicinity of the object contacts (A), to RF signal feed lines (L2) which have their own test terminals (Kt, Bu) and which are used for sampling RF signals supplied to the IC (IC) (from an RF signal generator MG). Measurement of IC parameters even in the GHz range, for example in the case of ICs which are needed for optoelectronic switching systems with extremely high bit rates, that is to say, for example, for ISDN systems. <IMAGE>
申请公布号 DE3703030(A1) 申请公布日期 1988.09.08
申请号 DE19873703030 申请日期 1987.02.02
申请人 SIEMENS AG 发明人 MILDE,GUNDOLF,DIPL.-ING.;SCHANTZ,HUGO,DIPL.-ING.
分类号 G01R1/04;(IPC1-7):G01R31/26 主分类号 G01R1/04
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