| 摘要 |
PURPOSE:To solve a problem of increasing the delay propagation time with an increase in the wiring capacitance due to a detouring wiring part by a method wherein a wiring region which is adjacent to a small-scale functional block situated to be adjacent to a large-scale functional block is installed after the wiring region has been extended into the adjacent large-scale functional block so that a wiring part detouring around the large-scale functional block can be eliminated. CONSTITUTION:Small-scale functional blocks 1-1-1-5 whose height and width are within a prescribed range and a large-scale functional block 2 whose height and width are bigger than those of said small-scale functional blocks 1-1-1-5 are installed; wiring parts 4, 5 which connect the functional blocks mutually are installed according to the sizes which differ at each position. In such a standard cell semiconductor circuit, a wring region which is adjacent to the small-scale functional blocks situated to be adjacent to said large-scale functional block 2 is installed after the wiring region has been extended into said adjacent large-scale functional block 2. For example, the wiring region to connect the small-scale block 1-3 to the block 1-5 is installed as a wiring region 7 after it has been extended into the adjacent large-scale functional block 2. |
