发明名称 FRAME MEMORY BOARD FOR IMAGE PROCESSOR
摘要 PURPOSE:To access optional length data by connecting a clock of a counter, a load input, a clock of a line counter and a load data input to an external signal input terminal of a frame memory board. CONSTITUTION:A load signal 8 of a counter 1, a clock 9 of the counter 1, a load signal 6 of a line counter 2 and a clock 7 of the line counter 2 are connected to the external signal terminal of a frame memory board. Thus, the frame data of large capacity is accessed by a few signal line and the consecutive data of an optional length is used as the accessible frame memory board.
申请公布号 JPS63216182(A) 申请公布日期 1988.09.08
申请号 JP19870047069 申请日期 1987.03.02
申请人 NIPPON SYST DESIGN KK 发明人 MUGITA KENJI
分类号 G06F12/00;G06F12/02;G06T1/60 主分类号 G06F12/00
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