| 摘要 |
PURPOSE:To improve the efficiency of area utilization of a semiconductor integrated circuit mask by a method wherein the source part of the mask is provided on the outer circumferential part of the mask, and the source parts of the adjoining masks are arranged common when the masks are arranged automatically. CONSTITUTION:The source parts 30 and 32 of the P-channel transistor part of a two-input NAND logical gate semiconductor integrated circuit mask and the source part 36 of an N-channel transistor part are provided on the outer circumferential part of the mask. Then, utilizing the fact that each mask has the same potential, the marginal measurements of the adjoining masks and the width of the source are reduced by making the source parts 32 and 34 common, the width in lateral direction of the automatically arranged masks can be reduced, and the efficiency of area utilization can also be improved. |
