| 摘要 |
PURPOSE:To improve the stability of a horizontal synchronizing PLL circuit using a gate circuit type phase comparator by detecting a code from a frequency divider in the PLL circuit for a prescribed period before and after a low frequency signal period such as a vertical synchronizing signal or the like so as to generate a pseudo horizontal synchronizing signal thereby compensating a composite synchronizing signal. CONSTITUTION:The pseudo horizontal synchronizing signal generator 105 detects a code from a frequency divider 102 to generate a pseudo horizontal synchronizing signal. A signal selector 108 selects a pseudo horizontal synchronizing signal E when the level of an output signal G of a (T1+T2) detector 109 is at logical 1 and selects a composite synchronizing separator signal F when the signal G is at logical 0. The output signal B is inputted to a phase comparator 103 and subjected to phase comparison with a frequency division signal A. Thus, the rate of levels 0, 1 in the output of a phase comparator 103 is made stable even during the low frequency signal period such as a vertical synchronizing signal and then the output D of the low pass filter 104 is stable. Then the disturbance of the picture is decreased. |
