发明名称 RECEIVER
摘要 PURPOSE:To simplify a circuit by using a circuit requiring no change its principle, rule or the like as a fixed part, and a circuit to be varied in accordance with a model or the like as a variable part, separating the two parts, and allowing input circuit parts, a character generating memory part and a control circuit part in the fixed part to use one CPU in common. CONSTITUTION:The input circuit parts 52, 53 for A/D converting an input signal, reading out the converted signal and temporarily storing the signal, the character generating memory part 55, a data processing circuit part 54 for executing sound and image processing at the time of reproducing and controlling these processing and the CPU 59 to be used by these parts 52-55 in common are constituted as the fixed part 50 and a CPU part 57 for controlling an external instruction and a memory part 58 for storing an input signal are constituted as the variable part 51. Consequently, plural circuits constituting the fixed part can be controlled only by one common CPU and the circuit can be simplified.
申请公布号 JPS63215180(A) 申请公布日期 1988.09.07
申请号 JP19870048345 申请日期 1987.03.03
申请人 FUJITSU GENERAL LTD 发明人 SOBASHIMA HIROSHI;SASAI HIDEJI;MINAMI YUJI;HASHIGUCHI KOTA;IKUTA SHOJI
分类号 H04N7/025;H04N7/03;H04N7/035;H04N7/08;H04N7/173 主分类号 H04N7/025
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