发明名称 DETECTING SYSTEM FOR FAULT OF SIGNAL IN BALANCED DOUBLE-CURRENT INTERCHANGE
摘要 <p>PURPOSE:To detect a fault even when the disconnection or the short-circuit of a single line or both lines of a balanced double-current interchange line, or the fault at a reception part are generated, by using a means which monitors a duty factor. CONSTITUTION:The titled system is provided with a duty factor monitoring part 1 being constituted of first counter 3 to monitor the signal width of the space part of a reception signal, an inverter 4 which inverts the reception signal, second counter 5 which inputs an inverted signal from the inverter 4 to monitor the signal width of the mark part of the reception signal, and an OR gate 6 which supplies the OR of the output signals outputted from two counters 3 and 5 when abnormality occurs in the reception signal, and a fault information output part 2 to output a bit of fault in formation from the duty factor monitoring part 1 to the outside, and the monitoring of the abnormality of the reception signal generated at the time of generating the disconnection of the single or both lines or the short-circuit of the balanced double- current interchange line is performed. In such a way, it is possible to detect the fault even when the disconnection or the short-circuit of the single or both lines of the balanced double-current interchange line, and the fault at the reception part are generated.</p>
申请公布号 JPS63215139(A) 申请公布日期 1988.09.07
申请号 JP19870047479 申请日期 1987.03.04
申请人 NEC CORP;NEC MIYAGI LTD 发明人 SHIMIZU YUKIHIKO;HIRAIWA HIDEAKI
分类号 H04L25/02;H04B3/46 主分类号 H04L25/02
代理机构 代理人
主权项
地址