| 摘要 |
PURPOSE:To remove the restriction in pattern design of a wiring by a method wherein the wiring metal layer connected to an emitter electrode, which is always in the potential higher than that of the base of an L-PNP transistor, is formed by covering a collector region. CONSTITUTION:A P-type emitter region 103E, a P-type collector region 103C and an N-type base region 103B are formed in the N-type epitaxial region 101 which is isolated by a P-type isolation region 102 in a semiconductor substrate. Then, an emitter electrode 104E, a collector electrode 104C and a base electrode 104B are formed in the apertures of an insulating layer 105. Subsequently, a wiring metal layer 11 is provided on an interlayer insulating layer 106 covering at least the collector region of a PNP horizontal transistor, and the layer 11 is connected to the emitter electrode 104E through the intermediary of the aperture provided on the layer 106. The effect of the negative movable ions in molded resin can be prevented by covering the transistor with the layer 11.
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